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 P1/5
HIGH-VOLTAGE MONOLITHIC IC
ECN3053F
ECN3053 is a single chip driver IC which has 6 MOS-Gated devices for its output. It is suitable for controlling 3-phase DC brushless motors and 3-phase induction motors. Functions Lower arm Over current (OC) Protection Under voltage Protection Fault Output function Features It can be controlled by PWM with 6 inputs from an external microprocessor. 6 logic inputs are compatible with 5V CMOS and LSTTL outputs. Package
SOP-28
Block Diagram
Db Db Db Cb Cb Cb
VCW
PGW
W VCV
PGV
V
VC U
W -p h ase u p p er d river
VCC CB
V -p h ase u p p er d river
U -p h ase u p p er d river
Lev e l S hifte r U V p ro te c tio n Lo gic o utp ut
PGU
U
NGU
U -p has e O utp ut
VCC C0
VB S up p ly
NGV
In p u t B u ffer
V -p has e O utp ut
NGW
W -p has e O utp ut
GL1
F AU L T
OC R1
O C p r o tec tio n
U V pro te c tio n O p-Am p
C1 GL2
Rs
S W T S W B S VT S VB S U T S U B
F
Rf
Inp ut
Vcc
A-
AO
PDE-3053-1
P2/5
ECN3053F
1. General This specification shall be applied to the following semiconductor integrated circuits. 1) Type : ECN3053F 2) Application : 3-phase Brushless Motor, 3-phase Induction Motor 3) Structure : Monolithic IC 4) Package : SOP28 2. Maximum Allowable Ratings (Ta=25 o C) No. ITEMS SYMBOLS UNIT VALUES CONDITIONS 1 Output Device Breakdown Vbv V 620 Between Vcu,v,w & GL1 voltage 2 GL2 terminal voltage Vgl2 V -5~Vcc Vcc=18Vmax at GL2=-5V 3 U,V,W terminal Voltage Vu,v,w V -5~600 4 Supply voltage Vcc V 20 5 Input voltage Vin V -0.5~Vcc+0.5 o 6 Operating Junction Temperature Tjop C -20~125 o 7 Storage Temperature Tstg C -40~150 Note 1 : Thermal resistance Rja PACKAGE SOP28 Single 121 Mounted 84 PCB size,Density * 120x21x1.6 (30%) Unit C/W o C/W mm
o
* This figure varies depending on the mounting condition.
PDE-3053-1
P3/5
ECN3053F
3. Electrical Characteristics Unless otherwise noted, Ta=25 C, Vu,v,w to GL1=374V,Vcc=15V.(suffix T=top, B=bottom arm)
No ITEMS 1 Stand-by current 2 Input Voltage (Output is L) Input Voltage (Output is H) 3 Output Source Current 4 Output Sink Current 5 High level Output Voltage 6 Low level Output Voltage 7 Leakage Current at HV terminal 8 Input Current 9 Input Current 10 Vcc Under voltage 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 Negative Going Reset Hysterisis Vcu,v,w Under Voltage Negative Going Reset Hysterisis OC Input Positive Going threshold Fault Output On Resistance Turn On Delay Time Turn Off Delay Time OC Output to Output Shutdown Delay OC to Fault Delay Fault Reset Delay Time Fault Output terminal Voltage Fault Output Sink Current VB Output Voltage VB Output Current Op-Amp Input Offset Voltage Op-Amp High Level Output Voltage Op-Amp Low Level Output Voltage Op-Amp Output Source Current Op-Amp Output Sink Current
SYMBOLS
Is1 Is2 VIH VIL Io+ IoVOH VOL IL IIL IIH Vuvb Vrhb Vuvt Vrht Voc Ronf ton toff toc tflt tflrs Vflt Iflt VB IB Vos VOHa VOLa Isrca Isnka
UNIT mA A V V A A mV mV V V V V V s s s s s V mA V mA mV V mV mA mA
* ;U/V /W
MIN. 3.5 0.2 0.4 -200 -120 9.5 0.1 8.9 0.1 0.44 6.5 -0.5 4 6.8 25 5.0 1.0 1.0
TYP. 6.5 15 0.25 0.5 10.5 0.4 10.5 0.4 0.49 300 0.8 0.5 0.7 0.6 10 7.5 7.5 -
MAX. CONDITIONS Vin=H or L , Between Vcc-GL1 10 Between Vcu-U,Vcv-V,Vcw-W 15V, 30 Vin=H or L Input=H or L 1.5 Vcu-PGU,Vcv-PGV, Vcw-PGW =15V, Vcc-NGU,V,W =15V PW<10s 100 100 50 11.6 0.9 12.1 0.9 0.54 400 1.5 1.2 1.7 1.6 20
Vcc+0.5 PGU-U,PGV-V, PGW-W =15V, NGU,V,W -GL2=15V PW<10s Vcu,v,w-PGU,V, W & Vcc-NGU,V,W Vin=0, Io=0 PGU,V, W-U,V,W & NGU,V,W -GL2 Vin=5V,Io=0
Vcu,v,w=U,V,W=600V
Vin=0V Internal Pull up R=200k Vin=5V Internal Pull up R=200k
F-GL1=0.5V CL=1000pF CL=1000pF CL=1000pF CL=1000pF CL=1000pF
RL=0 RL=0 RL=0 RL=0 RL=0
8.2 30 20 -
V(F&GL)=2V Delta Vload=0.1V GL2=A-=0.2V A-=0V GL2=1V A-=1V GL2=0V A-=0V GL2=1V AO=4V A-=1V GL2=0V AO=2V
Note 1: Vuvb, Vrhb, Vuvt and Vrht are defined and shown in Fig. 1.
NG*, P G * -* (V )
Vu vb, Vuvt
V rh b , V rh t 0 V C C ,V c* -* (V )
F ig 1 . N e ga tive go in g a n d rese t vo lta ge a n d h y ste risis fo r th e to p a n d b o tto m a rm u n d e r vo lta ge c irc u it
PDE-3053-1
P4/5
ECN3053F
4. Truth Table INPUT U phase V phase W phase Top arm Bot.arm Top arm Bot.arm Top arm Bot.arm SUT L ON H OFF SUB L ON H OFF SVT L ON H OFF SVB L L ON H OFF SWT L ON H OFF SWB L ON H OFF H OFF OFF OFF OFF OFF OFF SUT,SUB L OFF OFF SVT,SVB L OFF OFF SWT,SWB L OFF OFF Note 1: Fault output level is referenced Low when over current or under voltage for Vcc is detected. Note 2: Over current protection works when the voltage drop of the external sensing resistor exceeds the threshold voltage Voc(typical 0.49V). In this case all six outputs are turned off and Fault output level becomes low. Reset after detection is done by feeding high signal to all six inputs or re-supplying Vcc voltage. Note 3: The output signal for Fault is reset by feeding high signal to all six inputs. 5. Definition of switching delay Input (SUB,T, SVB,T, SWB,T ) Output (PGU,V,W, NGU,V,W)
50% 90% 10% 50%
OC Input
ton
tof
Input OC F Output (PGU,V,W NGU,V,W)
50% 50% 50% 50% 50%
tfl to tflr
PDE-3053-1
P5/5
ECN3053F
6. Recommended Operating Conditions ITEMS SYMBOLS UNIT VALUES TOL. CONDITIONS No. 1 Power Supply Voltage Vcc V 13.5~16.5 2 PWM Frequency fpwm kHz 1~20 3 VB Smoothing Capacitor Co > 0.22 Stress voltage:VB F 4 Boot Strap Capacitor Cb 3.3 Stress voltage:Vcc F 5 Boot Strap Diodes Db Hitachi DFG1C6 600V/1.0A DFM1F6 or equivalent < 0.1s 6 Sensing Resistor Rs Note 1 7 OC Filtering Resistor R1 Note 2 8 OC Filtering Capacitor C1 Note 2 F 9 Load resistor for F terminal Rf k > 5.6 Note 1. Over-current detection level is determined by the following equation Ioc=Voc/Rs Note.2 This IC has filters of 0.4us for noise reduction. But appropriate R1, C1 should be added when noise can not be removed. 7. Pin Assignment
1 2 3 4 5 6 7 8 9 10 11 12 13 14
VCC SUT SVT SWT SUB SVB SWB F OC CB AO AGL1 GL2
VCU PGU U N.C. VCV PGV V VCW PGW W N.C. NGU NGV NG
28 27 26 25 24 23 22 21 20 19 18 17 16 15
8.
Outline Drawing
1 8 .1 3 M A X
< SOP28 >
28 15
0 . 1 0
1
14
7 .5 2
1 0 .3 1
0 .20
0 .2 2 0 .0 5
1 .2 7 0 . 1 0
+ 0.1 0 0 .4 1 - 0 .0 5
2 .5 9 M A X + 0.0 5
-0.1 0
0 .1 5
0 .5 3 0 .2 0
0 .1 5
PDE-3053-1


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